公司信息
仙霞路99号1503室
As IP Cores Field Applications Engineer, Candidate will use his knowledge of Memory and PCIe/Ethernet PHYs/controllers to work with our current and future customers to help develop their ideas into reality. IP Cores FAE will have an opportunity to work across various market segments, designs, different foundries and process nodes ranging from 5nm (and below) to 40nm. FAE will be part of Sales Organization helping educate customers and provide solutions using our IP, especially around interface IP portfolio.
Responsibilities include:
· Collaborating with the sales and marketing team to identify and understand our customers’ technical/ business challenges. Develop appropriate strategies and solutions for customers, leveraging the broad Rambus IP portfolio.
· Presenting Rambus IP portfolio, focusing Ｏn Memory, PCIe/Ethernet PHY/controllers and presenting deep dives Ｏn IP architecture, details of the IP(s).
· Work with the Sales personnel and business unit to secure design wins. Set strategy at key accounts to displace competitors and win all open opportunities.
· Work Ｏn customer RFI/RFQs and drive internal technical/business alignment Ｏn RFI/RFQs.
· Influencing the IP development/roadmap by communicating customer needs/feedback to the IP marketing/R&D teams and addressing competitive challenges.
· Lab demos to customers during pre-sales phase and supporting demos at conferences.
· Supporting evaluations Ｏn-site/remote technical discussions, addressing technical problems and communicating engagement status to stake holders.
· Pre-sale customer support and co-ordinate during post sales.
· Write application notes, articles, design ideas, new product proposals for internal and/or external publication.
Qualifications:
· 5years of work experience in field application engineering/application engineering or another direct customer facing role
· Good understanding of latest SoC architectures and system-level design practices for Ｏne or more market segments (mobile, storage, automotive, networking, IoT) particularly from IP requirements perspective.
· Familiarity with DRAM, DDR/LPDDR, GDDR5/6,HBM2E/3, PCIe/Ethernet PHY/controllers.
Familiarity with test and product engineering methodologies
· Familiarity with RTL design, understand verification using Verilog or System Verilog, physical design flow, some familiarity with analog/mixed-signal design and verification flows, and basic understanding of package and PCB design flows and technologies
· Proven presentation skills and excellent verbal and written communication skills
· Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications
· Ability to analyze, summarize and generate status updates from technical data
· Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external
· Prior experience in selecting, using, designing, or supporting internal or external IP
Excellent communication/presentation skills in both English and Chinese
