公司信息
江苏省无锡市新吴区弘毅路8号金帛座5楼
As a Sr. Circuit Design Engineer, your primary job function is to design and develop digital, memory-ba
Responsibilities
Circuit design for common memory blocks such as Xdec, Ydec, HV circuits, charge pump, level shifters, sense-amps
Top full chip level schematic integration
Define and implement verification environments for block and full chip levels using digital (Verilog ba
Perform back-annotated netlist level simulations in Verilog or Spice-like environments
Support generation of various test vectors for block and full chip level simulations
Understand I/O timing definition and perform robust verification of timing parameters
Perform simulations for process corners, propose solutions to reduce sensitivities and improve performance
Support debug of silicon in prototype design phase
Participate in revision changes and tape outs
Skills
Must have experience with memory products, non-volatile desirable
Experience or exposure with common analog blocks such as bandgaps, comparators, current references, regulators
EDA tools including the Cadence and/or Mentor Graphics design fr
Exposure to Verilog/System Verilog language
Proficiency in Full Chip Spice Like simulators such as Finesim, Hsim, XA
Knowledge of sc
Initiative, innovation, good communication and team pla
Must have good problem solving skills
Must be self motivated
Requirements
5+ years of experience in verification environments, MSEE preferred
该岗位可定位在上海拍字节微电子有限公司或者无锡拍字节科技有限公司
