IC数字电路设计工程师 - SH

The Role
Working as a Senior/Principal Digital Design Engineer ba
• Participate IP and chip level architecture definition, derive functional and design specifications and analyse feasibility of technical and architectures.
• Implement design with Verilog to achieve specification goals. Simulate and debug the codes in the coding stage.
• Go through the frontend design flow to deliver qualified netlist. Co-work with back-end team to fix timing issue and check floorplan.
• Write ASIC specific part of test plan. Prove functional correctness from block level to top-level.
• Design for verification (assertion-ba
• Help other team members with technical training and coaching.
• Work as the technical contact point Ｏn the ASIC area.
• Maintain design environment, solve flow issues, and develop sc


What We Are Looking For?
• PHD, MSEE or BSEE with digital IC design experience.
• A minimum of 1 years digital design experience.
• Strong RTL coding and familiar with front-end design flow.
• Proven experience Ｏn synthesis, timing analysis and formal verification.
• Be familiar with shell/perl/tcl programming in Linux OS.
• Experience in mixed signal team is a plus; knowledge of analog design is a big plus.
• Experience in power management chip design is a plus.
• Experience in C/C++/SystemVerilog programming is a plus
• Good communication skills and fluent English.
• Strong responsibilities and team spirit.